BS IEC 60747-8:2000 pdf download – Semiconductor devices — Part 8: Field-effect transistors.
4.1.4
insulated-gate field-effect transistor (IGFET) a field-effect transistor in which:
— one or more gate electrodes are electrically insulated from the body:
— the conductivity type of both the source and drain regions is opposite from that of the semiconductor body in which they are located:
— the principal current flows in a channel that is formed by an inversion layer connecting source and drain regions;
— the inversion layer is either already present at zero gate-source voltage or produced within the body at sufficiently high forward gate-source voltage by accumulation of the minority charge carriers of the body material, and
— the conductance of the channel is controlled by the gate-source voltage, which controls the electric field between gate electrode and the body and hence the amount of accumulated minority charge carriers
4.1.5
metal-oxide-semiconductor field-effect transistor (MOSFET)
an insulated-gate field-effect transistor In which the insulating layer between each gate electrode and the channel is oxide material
4.1.6
depletion-type field-effect transistor
a field-effect transistor in which an inversion layer present at the surface of the active semiconductor region causes an appreciable channel conductance that may be increased (decreased) by applying a forward (reverse) gate-source voltage
4.1.7
enhancement-type field-effect transistor
a field-effect transistor having substantially zero channel conductance at zero gate-source voltage, and in which a conduction channel may be obtained by applying a sufficiently high forward gate-source voltage, which induces an inversion layer below the gate electrode
4.1.8
single-gate field-effect transistor
a field-effect transistor having a gate region, a source region, and a drain region
NOTE The term may be abbreviated to “field.effect transistor. if no ambiguity is likely lo occur.
4.1.9
dual-gate field-effect transistor
a field-effect transistor having two independent gate regions, a source region, and a drain region
4.1.10
Schottky-barrier-gate field-effect transistor a field-effect transistor in which:
— the source and drain regions are connected with each other by the channel region, all three being of the same conductivity type:
— one or more gate electrodes each form a Schottky-barrier with the channel region:
— the gate-source voltage controls the conductance of the conduction channel by varying its cross-section
5.2.2.1.1 A curve showing Ptotmax as a function of operating temperature (Tamb or Tcase), or (for power MOSFET only): 5.2.2.1.2 a) Maximum virtual channel temperature (Tvjmax), and 5.2.2.1.2 b) Absolute limiting value of total power dissipation (Potabs). NOTE When Tymax and Porabs are specified Rn and, where appropriate, Zrn should also be specified (see the relevant subclauses in 5.3). 5.2.2.2 For power MOSFET only: Maximum peak total power dissipation (PotMmax). A curve, showing Plotmmax (where appropriate). 5.2.2.3 For power MOSFET only: Safe operating area (SOAR) where appropriate, over the specified range of operating temperatures, under specified pulse conditions. 5.2.3 Voltages and currents Rating shall be given preferably by a curve over the range of operating temperatures, or at 25 °C and one other higher operating temperature, chosen from the list in clause 5, chapter IV of IEC 60747-1. 5.2.3.1 Maximum drain-source voltage, under specified conditions. 5.2.3.2 Maximum reverse gate-source voltage and, where appropriate, maximum forward gate-source voltage, under specified conditions. 5.2.3.3 Maximum gate-drain voltage, under specified conditions. 5.2.3.4 Maximum gate-gate voltage (for multiple-gate devices)， under specified conditions. 5.2.3.5 For insulated-gate field- effect transistors with separate source and substrate terminals (chopper or analog-switch types): . – maximum gate-substrate voltage, under specified conditions; – maximum drain-substrate voltage, under specified conditions; – maximum source-substrate voltage, under specified conditions.
6.5.4 Measurement procedure The specified drain-source voltage is applied. NOTE An additional substrate-source voltage may be applied if necessary. The gate-source voltage is adjusted to obtain the specified drain current in the cut-off region. This is the required value of the gate-source cut-off voltage. 6.5.5 Specified conditions – Ambient or reference-point temperature. – Drain-source voltage. – Drain current. 6.6 Gate-source threshold voltage (type C) (V GS(TO) ) 6.6.1 Purpose To measure the gate-source threshold voltage, under specified conditions. 6.6.2 Circuit diagram The circuit of figure 8 with suitable shield may be used for this measurement, except that the polarity of the gate-source voltage should be reversed. 6.6.3 Precautions to be observed The entire circuit should be placed inside an electrostatic screen.